As the dimensions within integrated circuits have grown ever smaller, solutions have had to be found to problems relating to misalignment of successive mask patterns relative to one another during processing. Thus, source and drain regions might not line up correctly relative to the gate, deposited contacts might not line up perfectly inside contact holes, and connections that were physically close together but had to be electrically isolated from one another might develop short circuits between them.
To overcome these problems, a variety of ingenious techniques have been introduced into the integrated circuit art. For example, alignment of source and drain relative to the gate was achieved by using the gate as a mask during ion implantation. The SALICIDE (self-aligned silicide) process took advantge of the fact that certain metals such as titanium or cobalt react when heated in contact with silicon to form conductive silicides but do not react with silicon oxide. Thus, oxide spacers on the vertical walls of the gate pedestal could be used to provide the necessary small, but well controlled, separation between the source and drain contacts and the gate contact.
Although the SALICIDE method made possible significant reductions in device size, as devices shrink even further shorting between the gate and the source/drain can be a problem in circuits of very high density. In such cases it is desirable to be able to limit the SALICIDE process to the lower density areas (where performance is the main concern) and use a simple silicide approach in the high density areas to reduce the risk of gate/drain shorting.
While there are many references in the prior art to both processes, none of these, to our knowledge, addresses the specific problem of integrating these different contacting methods for use on a single chip in both memory and logic circuits. The SALICIDE process is described by, for example, Tsai et al. (U.S. Pat. No. 5,648,287 July 1997) and Wang et al. (U.S. Pat. No. 5,508,212 April 1996) while Anjum et al. (U.S. Pat. No. 5,444,024 August 1995) show how the growth of a titanium silicide layer can be controlled through pre-bombardment with argon ions. Hayashi et al. (U.S. Pat. No. 5,635,426 June 1997) show how silicidation can be used to form local interconnections.